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VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 1 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 rgbw color sensor with i 2 c interface description VEML6040 color sensor senses red, green, blue, and white light and incorporates photodio des, amplifiers, and analog / digital circuits into a single chip using cmos process. with the color sensor applied, the brightness, and color temperature of backlight can be adjusted base on ambient light source that makes pane l looks more comfortable for end users eyes. VEML6040s adoption of filtron tm technology achieves the closest ambient light spectral sensitivity to real human eye responses. VEML6040 provides excellent temperature compensation capability for keeping the ou tput stable under changing temperature. VEML6040s function are easily operated via the simple command format of i 2 c (smbus compatible) interface protocol. VEML6040 s operating voltage ranges from 2.5 v to 3.6 v. VEML6040 is packaged in a lead (pb)-free 4 pin oplga package which offers the best market-proven reliability. features ? package type: surface mount ? dimensions (l x w x h in mm): 2.0 x 1.25 x 1.0 ? integrated modules: color sensor (rgbw) and signal conditioning ic ?filtron tm technology provides a spectrum matching real human eye responses ? supports low transmittance (dark) lens design ? fluorescent light flicker immunity ? provides 16-bit resolution for each channel (r, g, b, w) ? selectable maximum detect ion range (515.4, 1031, 2062, 4124, 8248, or 16 496) lux with highest sensitivity 0.007865 lux/step ? package: oplga ? temperature compensatio n: -40 c to +85 c ? low power consumption i 2 c (smbus compatible) interface ? floor life: 168 h, msl 3, according to j-std-020 ? output type: i 2 c bus ? operation voltage: 2.5 v to 3.6 v ? material categorization: fo r definitions of compliance please see www.vishay.com/doc?99912 applications ? handheld device ? notebook ? consumer device ? industrial and mechanical application note (1) adjustable through i 2 c interface note (1) moq: minimum order quantity product summary part number operating voltage range (v) i 2 c bus voltage range (v) peak sensitivity (nm) range of spectral bandwidth 0.5 (nm) output code VEML6040 2.5 to 3.6 1.7 to 3.6 650, 550, 450 (r, g, b) 35, 35, 40 (r, g, b) 16 bit, i 2 c ordering information ordering code packaging volume (1) remarks VEML6040a3og tape and reel moq: 2500 pcs 2.0 mm x 1.25 mm x 1.0 mm
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 2 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 block diagram absolute maximum ratings (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. max. unit supply voltage v dd 03.6v operation temperature range t amb -40 +85 c storage temperature range t stg -40 +85 c recommended operating conditions (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. max. unit supply voltage v dd 2.5 3.6 v operation temperature range t amb -40 +85 c i 2 c bus operating frequency f (i2cclk) 10 400 khz pin descriptions pin assignment symbol type function 1 gnd i ground 2 sdat i / o (open drain) i 2 c data bus data input / output 3sclkii 2 c digital bus clock input 4v dd i power supply input v dd s cl s da g nd 1 2 4 3 r g b w VEML6040 output buffer i 2 c interface control logic
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 3 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes (1) test condition: v dd = 3.3 v, temperature: 25 c (2) light source: white led (3) led spectrum given in fig. 1; it = 160 ms fig. 1 - normalized spectral response of used leds for measuring the irradiance responsivity basic characteristics (t amb = 25 c, unless otherwise specified) parameter test condition symbol min. typ. max. unit supply voltage v dd 2.5 - 3.6 v supply current i dd - 200 - a i 2 c signal input logic high v dd = 3.3 v v ih 1.5 - - v logic low v il --0.8 logic high v dd = 2.6 v v ih 1.4 - - v logic low v il --0.6 peak sensitivity wavelength pr - 650 - nm pg - 550 - nm pb - 450 - nm irradiance responsivity pr = 619 nm (3) -96- counts/(w/cm 2 ) pg = 518 nm (3) -74- pb = 467 nm (3) -56- detectable intensity minimum g channel, i t = 1280 ms (1)(2) - 0.007865 - lx maximum g channel, i t = 40 ms (1)(2) - 16 496 - dark offset g channel, i t = 80 ms (1) 0-3 operating temperature range t amb -40 - +85 c shutdown current light condition = dark, v dd = 3.6 v i dd - 800 - na 10 100 1000 10000 0 0.2 0.4 2.0 150 900 average gain 1 transient thermal impedance transient thermal impedance relative responsivity (w/cm 2 ) power (w) 2nd line wavelength (nm) 700 650 600 550 500 450 400 350 300 250 200 1.8 1.0 0.8 0.6 blue red green 850 800 750
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 4 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 fig. 2 - i 2 c bus timing diagram i 2 c bus timing characteristics (t amb = 25 c, unless otherwise specified) parameter symbol standard mode fast mode unit min. max. min. max. clock frequency f (smbclk) 10 100 10 400 khz bus free time between start and stop condition t (buf) 4.7 - 1.3 - s hold time after (repea ted) start condition; after this period, the fi rst clock is generated t (hdsta) 4.0 - 0.6 - s repeated start condition setup time t (susta) 4.7 - 0.6 - s stop condition setup time t (susto) 4.0 - 0.6 - s data hold time t (hddat) 300 - 90 - ns data setup time t (sudat) 250 - 100 - ns i 2 c clock (sck) low period t (low) 4.7 - 1.3 - s i 2 c clock (sck) high period t (high) 4.0 - 0.6 - s detect clock / data low timeout t (timeout) 25 35 - - ms clock / data fall time t (f) - 300 - 300 ns clock / data rise time t (r) - 1000 - 300 ns v ih v ih t (low) v il t (r) t (hdsta) t (buf) v il t (hddat) t (f) t (high) t (susta) t (sudat) t (susto) i2cbus clock (sclk) i2cbus data (sdat) p stop condition s star condition p s
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 5 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 parameter timing information fig. 3 - i 2 c bus timing for sending word command format fig. 4 - i 2 c bus timing for receiving word command format ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040 ack by VEML6040
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 6 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical performance characteristics (t amb = 25 c, unless otherwise specified) fig. 5 - normalized spectral response fig. 6 - normalized output vs. view angle application information pin connection with the host VEML6040 integrates r, g, b, and w sensor together with i 2 c interface. it is very easy for the baseband (cpu) to access VEML6040 output data via i 2 c interface without extra software algorithms. th e hardware schematic is shown in the following diagram. the 0.1 f capacitor near the v dd pin is used for power supply noise rejection. the 2.2 k s are suitable for the pull-up resistors of i 2 c. fig. 7 - hardware pi n connection diagram 10 100 1000 10000 0 0.1 0.4 1.0 400 1000 average gain 1 transient thermal impedance transient thermal impedance relative responsivity (w/cm 2 ) normalized response 2nd line wavelength (nm) 950 900 850 800 750 700 650 600 550 500 450 0.9 0.8 0.7 0.6 blue red green 0.5 0.3 0.2 white s da (2) s cl (3) g nd (1) v dd (4) c1 100 nf 2.5 v to 3.6 v 1.7 v to 3.6 v r2 r1 VEML6040 i 2 c bu s data s da i 2 c bu s clock s cl host micro controller
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 7 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 digital interface the VEML6040 contains a conf register (00h) used for operatio n control and parameter setup. measurement results are stored in four separate registers, one each fo r red, green, blue, and white respectively (08h to 0bh). all registers are accessible vi a i 2 c communication. figure 8 shows the basic i 2 c communication with the VEML6040. each of the registers in the VEML6040 are 16 bit wide, so 16 bit should be written when a write command is sent, and 16 bit should be read when a read command is sent. the built in i 2 c interface is compatible with i 2 c modes standard and fast: 100 khz to 400 khz fig. 8 - command protocol format note ? please note the repeat start condition when data is read from the sensor. a stop condit ion should not be sent here. slave address and function description VEML6040 uses 10h slave address for 7-bit i 2 c addressing protocol. VEML6040 has 16-bit resolution for each channel (r, g, b, and w) that provides sensitivity up to 0.0056 lux/step for g, which is advantageous under a low transmittance lens design (dark lens). note ? slave address is 7-bi t addressing protocol table 1 - slave address and command code description slave address 0x10 command code date byte low / high register name r / w bit 76543210 00h l conf r / w 0 it (2 : 0) 0 trig af sd h reserved r / w reserved 01h to 07h l reserved r / w reserved h reserved r / w reserved 08h l r_data r r_data (7 : 0) h r_data r r_data (15 : 8) 09h l g_data r g_data (7 : 0) h g_data r g_data (15 : 8) 0ah l b_data r b_data (7 : 0) h b_data r b_data (15 : 8) 0bh l w_data r w_data (7 : 0) h w_data r w_data (15 : 8) s slave address wr a command code a data byte low a data byte high a 17 8 11 1 818 p 11 send word f! write command to VEML6040 1 slave address 7 wr a command code a s slave address rd a data byte low a data byte high a p 11811711818 11 s receive word f! read data from VEML6040 s = start condition p = stop condition a = acknowledge shaded area = VEML6040 acknowledge
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 8 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 configuration register format VEML6040 has a 16-bit configuration register for controlling. the de scription of each command format is shown in the following tables. table 2-1 - command code 00h bits description slave address: 0x10; register name: co nf; command code: 00h / data byte low xitxtrigafsd bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0it2it1it00trigafsd description it integration time setting trig proceed one detecting cycle at manual force mode af auto / manual force mode sd chip shutdown setting table 2-2 - command code 00h register setting bits setting description bits setting description bit 7 default = 0 bit 3 default = 0 bit 6, 5, 4 it (2 : 0) (0 : 0 : 0) = 40 ms bit 2 trig 0 = no trigger (0 : 0 : 1) = 80 ms 1 = trig ger one time detect cycle (0 : 1 : 0) = 160 ms bit 1 af 0 = auto mode (0 : 1 : 1) = 320 ms 1 = force mode (1 : 0 : 0) = 640 ms bit 0 sd 0 = enable color sensor (1 : 0 : 1) = 1280 ms 1 = disable color sensor table 3-1 - reserve command code description reserved command code: 00h / data byte high command bit description reserved 7 : 0 default = 0x00 table 3-2 - reserve command code description reserved command code: 01h to 07h command bit description reserved 7 : 0 default = 0x00 table 4 - read out command code description register command code bit description r_data 0x08_l (08h data byte low) 7 : 0 0x00 to 0xff, r channel lsb output data 0x08_h (08h data byte high) 7 : 0 0x0 0 to 0xff, r channel msb output data g_data 0x09_l (09h data byte low) 7 : 0 0x00 to 0xff, g channel lsb output data 0x09_h (09h data byte high) 7 : 0 0x 00 to 0xff, g channel msb output data b_data 0x0a_l (0ah data byte low) 7 : 0 0x00 to 0xff, b channel lsb output data 0x0a_h (0ah data byte high) 7 : 0 0x0 0 to 0xff, b channel msb output data w_data 0x0b_l (0bh data byte low) 7 : 0 0x0 0 to 0xff, w channel lsb output data 0x0b_h (0bh data byte high) 7 : 0 0x0 0 to 0xff, w channel msb output data
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 9 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 data access each of the r, g, b, and w result register s has a 16-bit resolution (2 bytes). one byte is the lsb and the other byte is the ms b. the host needs to follow the read word protocol as shown in figure 7. the da ta format shows as below. note ? data byte low represents lsb and data byte high represents msb. the integration time settings result in the corre sponding resolutions that are shown in table 6. data auto-memorization VEML6040 keeps the last results read. these values will remain in the registers, and can be read from these registers, until th e device wakes up and a ne w measurement is made. lux and cct calculation in order to use the results to calculate th e lux or correlated color temperature, please refer to the designing the VEML6040 i nto an application application note ( www.vishay.com/doc?84331 ). table 5 - 16-bit data format VEML6040 16-bit data format data bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data byte low data byte high table 6 - g channel resolution and maximum detection range it settings g sensitivity max. detectable lux it (2 : 0) integration time (0 : 0 : 0) 40 ms 0.25168 16 496 (0 : 0 : 1) 80 ms 0.12584 8248 (0 : 1 : 0) 160 ms 0.06292 4124 (0 : 1 : 1) 320 ms 0.03146 2062 (1 : 0 : 0) 640 ms 0.01573 1031 (1 : 0 : 1) 1280 ms 0.007865 515.4 slave address wr a command code a s slave address rd a data byte low a data byte high a p s
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 10 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 package information in millimeters fig. 9 - VEML6040 a3og package dimensions layout notice and reference circuit in millimeters fig. 10 - VEML6040 pcb layout footprint recommended storage and rebaking conditions parameter conditions min. max. unit storage temperature 5 50 c relative humidity - 60 % open time - 168 h total time from the date code on the aluminized envelope (unopened) - 12 months rebaking tape and reel: 60 c - 22 h tube: 60 c - 22 h 0.70 top view side view x x 2.00 0.15 1 2 3 4 1.25 0.15 0.45 0.56 die 3 2 1 0.25 30um 10 um 0.45 0.05 1.10 0.55 0.05 1.0 0.35 0.05 x x 4 1 0.10 0~0.05 0~0.06 0~0.02 0~0.04 0.1 1.00 0.15 0.1 0.625 0.15
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 11 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 recommended infrared reflow soldering conditions which are based on j-std-020 c recommend normal solder reflow is 235 c to 255 c fig. 11 - VEML6040 oplga sold er reflow profile chart recommended iron tip soldering condition and warning handling 1. solder the device with the following conditions: 1.1. soldering tempera ture: 400 c (max.) 1.2. soldering time: 3 s (max.) 2. if the temperature of the method portion rises in addition to the resi dual stress between the lead s, the possibility that an open or short circuit occurs due to the defo rmation or destruction of the resin increases. 3. the following methods: vps and wave soldering, have not been suggested for the component assembly. 4. cleaning method conditions: 4.1. solvent: methyl alcohol, ethyl alcohol, isopropyl alcohol 4.2. solvent temperatu re < 45 c (max.) 4.3. time: 3 min (min.) ir reflow profile condition parameter conditions temperature time peak temperature 255 c + 0 c / - 5 c (max.: 260 c) 10 s preheat temperature rang e and timing 150 c to 200 c 60 s to 180 s timing within 5 c to peak temperature - 10 s to 30 s timing maintained ab ove temperature / time 217 c 60 s to 150 s timing from 25 c to peak temperature - 8 min (max.) ramp-up rate 3 c/s (max.) - ramp-down rate 6 c/s (max.) - temperature (oc)
VEML6040 www.vishay.com vishay semiconductors rev. 1.6, 21-nov-16 12 document number: 84276 for technical questions, contact: sensorstechsupport@vishay.com this document is subject to change without notice. the products described herein and this document are subject to specific disclaimers, set forth at www.vishay.com/doc?91000 tape packaging information in millimeters fig. 12 - VEML6040 a3og package carrier tape fig. 13 - taping direction fig. 14 - reel dimensions
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